Thomas Steel Henretty
395 Dreese Laboratories
2015 Neil Avenue
Columbus, Ohio 43210
henretty.1@osu.edu
2015 Neil Avenue
Columbus, Ohio 43210
henretty.1@osu.edu
About
I am a Ph.D. student in the High-performance Computing Research Laboratory at The Ohio State University. Stencil computations and domain-specific programming languages are the central topics of my research. Components of this work are being developed in the context of the medical imaging application domain as part of the Center for Domain-Specific Computing at the University of California, Los Angeles. In my spare time, I work with the Computer Architecture Research Laboratory on low-power and mobile computing technologies. I am advised by Prof. P. "Saday" Sadayappan and also work closely with Dr. Louis-Noël Pouchet, Prof. Radu Teodorescu, Prof. Atanas Rountev, and Prof. J. "Ram" Ramanujam.
Research Interests
Performance optimization of stencil computations
Stencil computations, the focus of my research, are an important class of
numerical methods generally used when approximating solutions to differential
equations using finite-difference methods. Stencils are used in a large
number of application domains, including image processing, computational
fluid dynamics, and climate modeling. Our particular research is focused on loop
and data layout transformations that enable high-performance execution of stencil
computations on multicore SIMD CPU architectures.
Domain-specific programming languages
When used with general-purpose programming languages, traditional compilers must
infer the intent of the programmer. Domain-specific programming languages
enable more explicit communication of a program's purpose to the compiler,
leading to more opportunities for performance optimization. We are currently
creating a domain-specific language for stencil computations that enables
aggressive, automatic optimization and parallelization of these codes across
multiple target architectures.
Energy optimization for mobile devices
Battery technology has been advancing at a substantially slower rate than
the most advanced mobile devices. Research in this area focuses on
system-level techniques to reduce power consumption on smartphones, tablets,
netbooks, and laptop computers.
Publications
K. Stock, T. Henretty, I. Murugandi, R. Harrison, P. Sadayappan. "Model-Driven SIMD Code Generation for a
Multi-Resolution Tensor Kernel," International Parallel and Distributed Processing Symposium (IPDPS), May
2011.
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T. Henretty, K. Stock, L.N. Pouchet, F. Franchetti, J. Ramanujam and P. Sadayappan. "Data Layout
Transformation for Stencil Computations on Short-Vector SIMD Architectures," International Conference on
Compiler Construction (CC), March 2011.
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M. Baskaran, A. Hartono, S. Tavarageri, T. Henretty, J. Ramanujam, and P. Sadayappan, "Parameterized Tiling
Revisited," International Symposium on Code Generation and Optimization (CGO), April 2010.
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Q. Lu, C. Alias, U. Bondhugula, T. Henretty, S. Krishnamoorthy, J. Ramanujam, A. Rountev, P. Sadayappan, Y.
Chen, H. Lin, T. Ngai, "Data Layout Transformation for Enhancing Data Locality on NUCA Chip
Multiprocessors," Proc. Intl. Conf. on Parallel Architectures and Compilation Techniques (PACT), September
2009.
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A. Hartono, Q. Lu, T. Henretty, S. Krishnamoorthy, H. Zhang, G. Baumgartner, D. E. Bernholdt, M. Nooijen,
R. Pitzer, J. Ramanujam, and P. Sadayappan, "Performance Optimization of Tensor Contraction Expressions for
Many-Body Methods in Quantum Chemistry," The Journal of Physical Chemistry A Vol. 113 (45), pp. 12715-
12723, 2009.
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