1 Introduction
 1.1 Classification of Translators
 1.2 History Snapshots
 1.3 The Making of Compilers
 1.4 Theoretical Foundations
 1.5 Course Conduct
 1.6 The Course Project
Assignment 1: Object Code (Due: Th, April 3)
The MINI-MACHINE Computer
2 Lexical Analyzer (Scanner)
 2.1 Overview
 2.2 Finite State Automata
 2.3 Finite State Automata Languages
 2.4 Deterministic Finite State Automata
 2.5 Transforming FSA to $ϵ$-Free DFSA
 2.6 Regular Grammars
 2.7 Converting Regular Grammars into FSAs
 2.8 Brute Force Implementation of DFSAs
 2.9 Table Driven Implementation for DFSAs
 2.10 Lexical Analyzers and FSAs
 2.11 Lexical Analyzers and DFSAs
 2.12 Lookup Tables
 2.13 Table-Driven Scanners
Assignment 2: A Table Driven Scanner (Due: Th, April 10)
L756 Language Manual
3 Automata and Grammars for Syntax Analyzers (Parsers)
 3.1 Pushdown Automata
 3.2 Context Free Grammars
 3.3 Parse Trees
 3.4 Parsing Directions
 3.5 From Context Free Grammars to Pushdown Automata
 3.6 Deterministic Pushdown Automata
4 Top-Down Parsers
 4.1 Top-down Parsing with Backtracking
 4.2 Predictive Parsing and LL(1) Grammars
 4.3 Recursive Descent Parsing
 4.4 LL(1) Parsers
 4.5 Determining Lookahead Symbols
 4.6 Algorithms for the FIRST and FOLLOW Functions
 4.7 LL(k) Grammars
Assignment 3: An LL(1) Parser (Due: Tu, April 29)
5 Syntax-Directed Code Generator
 5.1 Syntax-Directed Translation Schemes (SDTS’s)
 5.2 Simple Syntax-Directed Translation Schemes
 5.3 Pushdown Transducers
 5.4 Code Generation
 5.5 Requests for Code Generation Actions
 5.6 Attribute Grammars
 5.7 Interfacing LL(1) Parsers with Code Generators
6 Semantics Actions
 6.1 Assumptions
 6.2 Variable Declarations and I/O
 6.3 Declarations Revisited
 6.4 Assignment Instructions and Integer Constants
 6.5 Expressions
 6.6 Unconditional Branching
 6.7 Conditional Branching
 6.8 Loops
Assignment 4: A Code Generator (Due: Th, May 15)
7 Bottom-Up Parsing
 7.1 Shift-Reduced Parsing
 7.2 LR Parsing
 7.3 LR(0)
 7.4 LR(0) Parse Table
 7.5 Shift-Reduce and Reduce-Reduce Conflicts
 7.6 LR(1)
 7.7 LALR(1)
 7.8 SLR(1)
 7.9 LR(1) but not LALR(1)
 7.10 Deletion of Unit Rules
 7.11 Precedence and Associativity Resolutions
 7.12 Interfacing LR(1) Parsing with LL(1) Parsing and Code Generation
Assignment 5: An LR Parser (Due: Th, May 22)
8 Flex: A Scanner Generator for C/C++
 8.1 Underlying architecture
 8.2 Compilation and Execution
 8.3 Actions
 8.4 Patterns
 8.5 Flex Declarations
 8.6 Input Source
 8.7 C++ Scanners
9 Bison: A Parser Generator for C/C++
 9.1 Underlying Architecture
 9.2 Compilation and Execution
 9.3 Lexical and Semantics Information
 9.4 Additional Features
 9.5 Interfacing Bison with Flex
10 JFLex: A Scanner Generator for Java
 10.1 Document Structure
 10.2 Compilation and Execution
 10.3 Declarations
11 CUP: A Parser Generator for Java
 11.1 Document Structure
 11.2 Syntax and Semantics Values
 11.3 Compilation
12 ANTLR: A Compiler Construction Tool
Assignment 6: Scanner and Parser Generators (Due: Tu, May 27)
13 Memory Organization
 13.1 Storage Allocation
 13.2 Arrays
 13.3 Strings
 13.4 Procedures
14 Intermediate Code
15 Code Generation for Basic Blocks: Straight-Line Code
 15.1 Source of Difficulties
 15.2 Assumptions
 15.3 Analysis of Intermediate Code
 15.4 Register Allocation Algorithm
 15.5 Code Generator
16 Code Generation for Basic Blocks: Directed Acyclic Graphs (DAGs)
 16.1 From Straight Line Code to DAGs
 16.2 Code Generator
17 Code Generation for Basic Blocks: Trees
 17.1 Node Labeling
 17.2 Code Generation
 17.3 Observations
18 Code Improvement (Optimization)
 18.1 Code Motion
 18.2 Reduction in Strength
 18.3 Loop Unrolling
 18.4 Loop Fusion and Fission
 18.5 Loop Defactorization
 18.6 Constant Propagation (folding)
 18.7 Loop Unswitching