I have recently graduated with a Ph.D. from the Department of Computer Science and Engineering at the Ohio State University. I was advised by Dr. P. Sadayappan. I now work at Reservoir Labs Inc., New York.

Research Interests

  • Compile-time and Run-time Optimizations and Techniques
  • Automatic Parallelization and Optimizations for Modern Parallel Architectures
  • Parallel Programming Models

Publications

  1. Parameterized Tiling Revisited
    Muthu Manikandan Baskaran, Albert Hartono, Tom Henretty, Sanket Tavarageri, J. Ramanujam, and P. Sadayappan.
    International Symposium on Code Generation and Optimization (CGO'10), Apr 2010, Toronto, Canada.

  2. Parametric Tiled Loop Generation for Effective Parallel Execution on Multicore Processors
    Albert Hartono, Muthu Manikandan Baskaran, J. Ramanujam, and P. Sadayappan.
    IEEE International Parallel and Distributed Processing Symposium (IPDPS'10), Apr 2010, Atlanta, GA.

  3. Optimal Loop Unrolling for GPGPU Programs
    Giridhar Sreenivasa Murthy, Mahesh Ravishankar, Muthu Manikandan Baskaran, and P. Sadayappan.
    IEEE International Parallel and Distributed Processing Symposium (IPDPS'10), Apr 2010, Atlanta, GA.

  4. Automatic C-to-CUDA Code Generation for Affine Programs
    Muthu Manikandan Baskaran, J. Ramanujam, and P. Sadayappan.
    International Conference on Compiler Construction (ETAPS CC'10), Mar 2010, Paphos, Cyprus.

  5. Parametric Multi-Level Tiling of Imperfectly Nested Loops
    Albert Hartono, Muthu Manikandan Baskaran, Cedric Bastoul, Albert Cohen, S. Krishnamoorthy, Boyana Norris, J. Ramanujam, and P. Sadayappan.
    ACM International Conference on Supercomputing (ICS'09), Jun 2009, Yorktown Heights, NY.

  6. Compiler-Assisted Dynamic Scheduling for Effective Parallelization of Loop Nests on Multicore Processors [PDF]
    Muthu Manikandan Baskaran, Nagavijayalakshmi Vydyanathan, Uday Bondhugula, J. Ramanujam, A. Rountev, and P. Sadayappan.
    ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP'09), Feb 2009, Raleigh, North Carolina.

  7. A Polyhedral Framework for Automatic Parallelization and Locality Optimization
    Uday Bondhugula, Muthu Manikandan Baskaran, Albert Hartono, S. Krishnamoorthy, J. Ramanujam, A. Rountev, and P. Sadayappan.
    Workshop on Compilers for Parallel Computing (CPC'09), Jan 2009, Zurich, Switzerland.

  8. A Compiler Framework for Optimization of Affine Loop Nests for GPGPUs [PDF]
    Muthu Manikandan Baskaran, Uday Bondhugula, S. Krishnamoorthy, J. Ramanujam, A. Rountev, and P. Sadayappan.
    ACM International Conference on Supercomputing (ICS'08), Jun 2008, Island of Kos, Greece.

  9. Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model [PDF]
    Uday Bondhugula, Muthu Manikandan Baskaran, S. Krishnamoorthy, J. Ramanujam, A.Rountev, and P. Sadayappan.
    International Conference on Compiler Construction (ETAPS CC'08), Apr 2008, Budapest, Hungary.

  10. Automatic Data Movement and Computation Mapping for Multi-level Parallel Architectures with Explicitly Managed Memories [PDF]
    Muthu Manikandan Baskaran, Uday Bondhugula, S. Krishnamoorthy, J. Ramanujam, A. Rountev, and P. Sadayappan.
    ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP'08), Feb 2008, Salt Lake City, Utah.

  11. Effective Automatic Parallelization of Stencil Computations [PDF]
    S. Krishnamoorthy, Muthu Manikandan Baskaran, Uday Bondhugula, J. Ramanujam, A. Rountev, and P. Sadayappan.
    ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI'07), Jun 2007, San Diego, California.

  12. An Efficient Distributed Shared Memory Toolbox for MATLAB [PDF]
    Rajkiran Panuganti, Muthu Manikandan Baskaran, Ashok Krishnamurthy, Jarek Nieplocha, A. Rountev, and P. Sadayappan.
    International Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS'07), Mar 2007, Long Beach, California.

Technical Reports

  1. Optimizing Sparse Matrix-Vector Multiplication on GPUs Using Compile-time and Run-time Strategies
    Muthu Manikandan Baskaran and Rajesh Bordawekar.
    Research Report RC24704, IBM TJ Watson Research Center.

  2. A Compiler Framework for Optimization of Affine Loop Nests for General Purpose Computations on GPUs [PDF]
    Muthu Manikandan Baskaran, Uday Bondhugula, S. Krishnamoorthy, J. Ramanujam, A. Rountev, and P. Sadayappan.
    Technical Report OSU-CISRC-12/07-TR78, The Ohio State University.

  3. Automatic Data Movement and Computation Mapping for Multi-level Parallel Architectures with Explicitly Managed Memories [PDF]
    Muthu Manikandan Baskaran, Uday Bondhugula, S. Krishnamoorthy, J. Ramanujam, A. Rountev, and P. Sadayappan.
    Technical Report OSU-CISRC-2/08-TR05, The Ohio State University.

  4. Affine transformations for communication minimal parallelization and locality optimization of arbitrarily nested loop sequences [PDF]
    Uday Bondhugula, Muthu Manikandan Baskaran, S. Krishnamoorthy, J. Ramanujam, A. Rountev, and P. Sadayappan.
    Technical Report OSU-CISRC-5/07-TR43, The Ohio State University.

    5. Contact

    Email: baskaran@cse.ohio-state.edu
    Phone: +1-614-292-7036 (Office)
    Mailing Address:
    2015 Neil Avenue
    395 Dreese Laboratories
    Columbus, OH 43210, USA