Memory hierarchy considerations for cost-effective cluster computing 

X. Du, X. Zhang, and Z. Zhu 

IEEE Transactions on Computers, Vol. 49, No. 9, 2000, pp. 915-933.  

Abstract 

Using off-the-shelf commodity workstations and PCs to build a cluster
for parallel computing has become a common practice.  The
cost-effectiveness of a cluster computing platform for a given budget
and for certain types of applications is mainly determined by its
memory hierarchy and the interconnection network configurations of the
cluster.  Finding such a cost-effective solution from exhaustive
simulations would be highly time-consuming; and predictions from
measurements on existing clusters would be impractical. We present an
analytical model for evaluating the performance impact of memory
hierarchies and networks on cluster computing. The model covers the
memory hierarchy of a single SMP, a cluster of workstations/PCs, or a
cluster of SMPs by changing various architectural parameters.  Network
variations covering both bus and switch networks are also included in
the analysis.  Different types of applications are characterized by
parameterized workloads with different computation and communication
requirements.  The model has been validated by simulations and
measurements.  The workloads used for experiments are both scientific
applications and commercial workloads.  Our study shows that the depth
of the memory hierarchy is the most sensitive factor affecting the
execution time for many types of workloads.  However, the
interconnection network cost of a tightly coupled system with a short
depth in memory hierarchy, such as an SMP, is significantly more
expensive than a normal cluster network connecting independent computer
nodes.  Thus, the essential issue to be considered is the trade-off
between the depth of the memory hierarchy and the system cost.  Based on
analyses and case studies, we present our quantitative recommendations
for building cost-effective clusters for different workloads.