Workshop on Communication Architecture for Clusters

CAC '02

To be held on Tuesday, April 22, 2003
in Conjunction with
Int'l Parallel and Distributed Processing Symposium (IPDPS '03)
Nice Acropolis Convention Center, Nice, France April 22-26, 2003




Papers presented in this workshop were published by IEEE Computer Society Press as a part of the IPDPS '03 conference and workshops proceedings . The papers are available under Workshop 9.



Advance Program

April 22 (Tuesday)

7:50 -  8:00 Welcome and Workshop Introduction

8:00 -  9:00 Keynote Talk

Dan Reed, NCSA and UIUC
Clusters: Challenges and Opportunities

9:00 -  10:00 Session I

Communications Hardware
Session Chair: Mitchell Gusat, IBM Zurich Research Laboratory

Each presentation is for 15 minutes. The last 15 minutes of the session is for discussion.

10:00 -  10:30 Break

10:30 -  11:30 Session II

Network Interfaces and Collective Communication
Session Chair: Olav Lysne, Univ. of Oslo, Norway

Each presentation is for 15 minutes. The last 15 minutes of the session is for discussion.

11:30 -  1:15 Lunch (On your own)

 1:15 -  2:15 Session III

Communication Libraries
Session Chair: Scott Pakin, Los Alamos National Laboratory

Each presentation is for 15 minutes. The last 15 minutes of the session is for discussion.

 2:15 -  2:55 Session IV

System Services
Session Chair: Adolfy Hoisie, Los Alamos National Laboratory

Each presentation is for 15 minutes. The last 10 minutes of the session is for discussion.

2:55 - 3:30 Break

3:30 - 4:10 Session V

Performance Evaluation
Session Chair: Pete Wyckoff, Ohio Supercomputer Center

Each presentation is for 15 minutes. The last 10 minutes of the session is for discussion.

 4:10 -  4:30 Short Break

 4:30 -  6:00 Panel Session

Title: Cluster Interconnect Technologies: What are the Top Three Limitations?

Description: Despite recent advancements, cluster interconnects continue to be a limiting factor in building and using large-scale clusters. The performance of cluster interconnects has only recently begun to match the performance of custom interconnects deployed in parallel machines nearly ten years ago. However, there are many other factors that can affect the performance and usability of cluster interconnects. In order for large-scale clusters to remain a viable computational platform, these limitations must be addressed.

The following questions were posed to the panelists: Given the current state of cluster interconnect technology, what are the top three technologies, or parts thereof, that are limitating cluster interconnects (networks, communication layers, libraries, programming models, etc.). What features and improvements are needed in communication subsystems to build next generation clusters? Assuming full freedom, what improvements need to be done to the communication subsystem to build next generation clusters?

Each panelist was asked to indicate three items in each catergory and provide justification for it. After the panelists asserted their positions, the attendees (as well as the panelists) cross-examined the panelists. Towards the end of this panel, we took a vote from the attendees to see what list they came up with and how it agreed with the opinion by the panelists.


Moderator: Ron Brightwell, Sandia National Labs

Panelists:
Mitchell Gusat, IBM Zurich Presentation Slides
Jarek Nieplocha, PNNL
Dan Reed, NCSA/UIUC Presentation Slides
Tom Sterling, CalTech/JPL Presentation Slides
Thomas Stricker, ETH Zurich Presentation Slides

 6:00 - Adjourn


Registration and Hotel information

Workshop registration is handled by the IPDPS '03 conference. There is a single registration for the conference and all of its 18 workshops. Please visit IPDPS'03 web page for registration and hotel information.

Deadline for hotel reservation is January 31, 2003 and deadline for advance registration is April 7, 2003.


Call For Papers

THEME:

The availability of commodity PCs/workstations and high-speed networks (Local Area Networks and System Area Networks) at low prices enabled the development of low-cost clusters. These clusters are being targeted for support of traditional high-end computing applications as well as emerging applications, especially those requiring high-performance servers. Designing high-performance and scalable clusters for these emerging applications requires design and development of high-performance communication and I/O subsystems, low-overhead programming environment support and support for Quality of Service (QoS). New user-level communication protocol standards such as Virtual Interface Architecture (VIA) and InfiniBand Architecture (IBA) are providing exciting ways to design high-performance communication and I/O architectures for clusters.

A large number of research groups from academia, industry, and research labs are currently engaged in the above research directions. The goal of this workshop is to bring together researchers and practitioners working in the areas of communication, I/O, and architecture to discuss state-of-the-art solutions as well as future trends for designing scalable, high-performance, and cost-effective communication and I/O architectures for clusters.

The first two workshops in this series (CAC '01 and CAC '02) were held in conjunction with IPDPS conferences, and they were very successful. The CAC '03 workshop plans to continue this tradition.

TOPICS OF INTEREST:

Topics of interest for the workshop include but are not limited to:
  1. Router/switch, network, and network-interface architecture for supporting efficient point-to-point communication, collective communication, and I/O at intra-cluster and inter-cluster levels.
  2. Design, development, and implementation of communication protocols (GM, VIA, TCP/IP, etc) on different networking and interconnect technologies (such as Myrinet, Gigabit Ethernet, InfiniBand, Quadrics, TCP Offload Engine, etc.).
  3. High-performance implementation of different programming layers (Message Passing Interface (MPI), Distributed Shared Memory such as TreadMarks, Get/Put, Global Arrays, sockets, etc.) and File Systems (such as PVFS and DAFS).
  4. Communication and architectural issues related to switch organization, flow control, congestion control, routing and deadlock-handling, load balancing, reliability, and QoS support.
  5. Strategies, algorithms, and protocols for management of communication resources, including topology discovery, hot update/replacement of components, dynamic reconfigurations, etc.
  6. Performance evaluation and tools for different application areas, including interprocessor communication and I/O, etc.
Results of both theoretical and practical significance will be considered.

PROCEEDINGS:

The proceedings of this workshop will be published together with the proceedings of other IPDPS '03 workshops by the IEEE Computer Society Press.

PAPER SUBMISSIONS:

We are planning a purely electronic submission and review process. Authors are requested to submit papers (in PDF format) not exceeding 10 single-spaced pages, including abstract, five key words, contact address, figures, and references. E-mail your manuscripts to: cac@cse.ohio-state.edu.

Note: the PDF file must be viewable using the ``acroread'' tool. It is also important, when creating your PDF file, to use a page size of 8.5x11 inches (LETTER sized output not A4), since an A4 sized page may be truncated on a LETTER sized printer.

SCHEDULE:

  

Paper submission:           November 4, 2002 
Notification of acceptance: December 20, 2002 
Camera-ready due:           January 24, 2003 


WORKSHOP CO-CHAIRS:

Dhabaleswar K. Panda (Ohio State), Jose Duato (Univ. of Valencia, Spain), and Craig Stunkel (IBM TJ Watson Research Center)

PROGRAM COMMITTEE:

PUBLICITY COORDINATORS:

Darius Buntinas (Ohio State) and Nectarios G. Koziris (National Technical Univ. of Athens, Greece)

ADDITIONAL INFORMATION:

For further questions, send e-mail to cac@cse.ohio-state.edu.


Last updated May 4, 2003